The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains a Bus Controller (BC), a Bus Monitor Terminal (MT) and two independent Remote Terminals (RTs). Any combination of the contained 1553 functions can be enabled for concurrent operation. The enabled terminals communicate with the MIL-STD-1553 buses through a shared on-chip dual bus transceiver and external transformer. The user allocates 64K bytes of on-chip static RAM between devices to suit application requirements.
Contact us for lead time
Click below to request a quote for this item. Or for product advice, stock and lead time enquiries call our team on 0330 313 3220.
Shared 1553 bus interface reduces circuit complexity and circuit board area.
Fully programmable Bus Controller with 28 op code instruction set.
Bus Monitor can operate in dual-stack mode, recording commands and data separately, with 16-bit or 48-bit time tagging.
Bus Monitor can record commands and data in single-stack mode, using IRIG-106 Chapter 10 “packet body” format.
Single-stack Bus Monitor and can optionally generate complete IRIG-106 data packets, including full packet headers and trailers.
Independent 16-bit time tag counters and clock sources for all terminals. The Bus Controller and Monitor also have 32- and 48-bit time count options, respectively.
64-Word Interrupt Log Buffer queues the most recent 32 interrupts. Hardware-assisted interrupt decoding quickly identifies interrupt sources.
RAM Error Detection/Correction option
Built-in self-test for protocol logic, digital signal paths and internal RAM.
Optional self-initialization at reset uses external serial EEPROM
±8kV ESD Protection (HBM, all pins).
Two temperature ranges: -40°C to +85°C, or -55°C to +125°C with optional burn-in.
