3D Plus are a France-based supplier of advanced high density 3D microelectronic products and flexible stacking technology. Its patented technology portfolio starts with standard package scale upward to die-size and wafer-level stacking processes, and, enables stacking heterogeneous active, passive and optoelectronics devices in a single highly-miniaturised package.
Their technology caters to a diverse range of needs and requirements going from low volume-space qualified up to high volume industrial applications including:
- Aircraft and unmanned vehicles
- Defence and security
- Computer boards and embedded systems
- Medical and sciences
3D Plus' portfolio of patented and leading-edge stacking technologies starts with standard packages that scale upward to die-size and wafer-level stacking processes. Although the detailed process flows can be different, their stacking technology all rely on the same four key principles:
- High stacking of heterogeneous non-modified standard die, wafer, packages and passive components
- Excellent yield thanks to the test/screening of each layer before stacking
- High-reliability bus metal-edge interconnection techniques (cold process)
- Use of very simple and well-proven technologies
3D Plus provides four different very flexible stack technology flows:
Standard Packages Stack
With the capability to stack n-High any standard packages from the industry, this process flow is based on very simple and well-proven technologies. A large products portfolio using this technology relies on TSOPs packages. This capability domain is also qualified by European Space Agency (ESA) for Space application.
Flex Process – Die Stack
With the capability to stack n-High any non-modified standard die (even with different sizes and technology), this process flow enables to embed the best semiconductors together in one single highly miniaturized package. High reliability and resistance to harsh environments, and very good manufacturing yield are also key benefits of this die stacking technology.
Flex Process – SiP Stack
This process has the unique capability to stack n-High any heterogeneous active, passive and Optoelectronics devices in a single highly miniaturized package. This is the most efficient technology for building complex System-In-Packages (SiPs). This capability domain is also qualified by European Space Agency (ESA) for Space application.
Wafer Level Stack - WDoD™
Based on the use of standard wafers (die without « TSV »), and with the capability to stack die with different sizes up to 10 levels, our wafer-level stack technology named WDoD™ (Wirefree Die-on-Die) achieves smaller form factors and Ultra Low Profile 3D stacks.
Depending on the product’s performance requirements and targeted market, the relevant stacking process will be selected within 3D PLUS technology portfolio in order to bring the best-added value and benefits for our customer's designs.
Benefiting from high-quality standards based on the ISO9001 certification, our 3D stacking technology is accredited by the European Space Agency (ESA) and the French Space Agency (CNES) for Space applications.