HI-6130

The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains a Bus Controller (BC), a Bus Monitor Terminal (MT) and two independent Remote Terminals (RTs). Any combination of the contained 1553 functions can be enabled for concurrent operation. The enabled terminals communicate with the MIL-STD-1553 buses through a shared on-chip dual bus transceiver and external transformer. The user allocates 64K bytes of on-chip static RAM between devices to suit application requirements.

Two options are offered for host access to internal registers and static RAM:

• The HI-6130 uses a 16-bit parallel bus
• The HI-6131 communicates with the host via a 4-wire serial peripheral interface (SPI).

Package options vary, based on host interface I/O pin count.

Programmable interrupts provide terminal status to the host processor. Circular data stacks in RAM have rollover and programmable “level attained” interrupts. The HI- 613x can be configured for automatic self-initialization after reset. A dedicated SPI port reads data from an external serial EEPROM to fully configure registers and RAM for any subset of one to four terminal devices.

Software

Various software support options are available for the HI-6130. A development kit (ADK-6130) includes low level software that demonstrates the broad features of the device. The API Application Development Kit (ADK-6130-2) includes Holt's MIL-STD-1553 Application Programming Interface (API) library.