HI-6110

The HI-6110 is a CMOS integrated circuit designed to implement the MIL-STD-1553 protocol between a host processor and a dual redundant MIL-STD-1553 data bus. The single chip architecture contains all the necessary logic and memory to process and store the data and command words for one complete MIL-STD-1553 message. In addition, the chip also includes the analogue transceivers.

The HI-6110 may be configured as a Bus Controller (BC), a Remote Terminal (RT), an addressed Monitor Terminal (MT) or an unaddressed MT. Registers are provided to store both incoming and outgoing command words. Incoming and outgoing data word storage is provided by 32-word FIFOs. The HI-6110 is available in a small, 64-pin plastic chip-scale package (QFN) or a 52-pin plastic quad flat pack (PQFP).