P4C1048L

The P4C1048L is a 4 Megabit high speed CMOS static RAM organised as 512K x 8. The CMOS memory requires no clock or refreshing and has equal access and cycle times. Inputs and outputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply.

Access times as fast as 45 nanoseconds permit greatly enhanced system operating speeds. CMOS is utilised to reduce power consumption to a low level.

The P4C1048L device provides asynchronous operation with matching access and cycle times. Memory locations are specified on address pins A0 to A18. Reading is accomplished by device selection (CE low) and output enabling (OE) while write enable (WE) remains HIGH. By presenting the address under these conditions, the data in the addressed memory location is presented on the data input/output pins. The input/output pins stay in the HIGH Z state when either CE is HIGH or WE is LOW.

The P4C1048L is packaged in a 32 pin 45 mil plastic SOP, 32 pin TSOP II, or 600 mil plastic or ceramic sidebrazed DIP.