Search results for: 'chrome gland mapem of bits with emc protection p6022'

3.3V operation. BC, MT and two RTs may operate concurrently. Integrated dual transceivers. 32K x 16 RAM with optional error detection/correction, 16-bit parallel host interface.

Equivalent to HI-6130 with reduced package size and SPI host interface

3.3V, 10Mbit/sec, EBR-1553 operation. BC, MT or RT. 32K x 16 RAM with optional error detection/correction, 16-bit parallel host interface.

3.3V operation. Integrated dual transceivers. 32K x 16 RAM, illegal command detection, data buffering, time tag, optional auto initialization, 16-bit parallel host interface.

Equivalent to HI-6120 with reduced package size and SPI host interface.

3.3V operation. Variable transmitter output amplitude controlled via an internal DAC or voltage reference pin.

3.3V operation. Integrated dual transceivers. Uses isolation transformer ratio 1:2.5 for transformer coupled mode.

3.3V or 5V operation.

BC/RT/MT or RT/MT Modes, ECC SRAM and integrated dual transceivers. Register-level software compatible with competitor legacy devices.

Remote Terminal, ECC SRAM and integrated dual transceivers. Register-level software compatible with competitor legacy devices.