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Items 61-70 of 1630
HI-6130
3.3V operation. BC, MT and two RTs may operate concurrently. Integrated dual transceivers. 32K x 16 RAM with optional error detection/correction, 16-bit parallel host interface.
HI-6131
Equivalent to HI-6130 with reduced package size and SPI host interface
HI-6140
3.3V, 10Mbit/sec, EBR-1553 operation. BC, MT or RT. 32K x 16 RAM with optional error detection/correction, 16-bit parallel host interface.
HI-6120
3.3V operation. Integrated dual transceivers. 32K x 16 RAM, illegal command detection, data buffering, time tag, optional auto initialization, 16-bit parallel host interface.
HI-6121
Equivalent to HI-6120 with reduced package size and SPI host interface.
HI-6110
3.3V operation. Integrated dual transceivers. Single message processor.
HI-25850
3.3V operation. MIL-STD-1553 / MIL-STD-1760 dual transceiver with integrated dual transformers. Low profile design. 1.8V, 2.5V and 3.3V compatible digital I/O. Bus tail-off compensation.
HI-15850
3.3V Operation. 1.8V, 2.5V and 3.3V compatible digital I/O. Bus tail-off compensation. MIL-STD-1760 compatible. Uses isolation transformer ratio 1:2.07 for transformer coupled mode.
HI-1585
3.3V Operation. Bus tail-off compensation. MIL-STD-1760 compatible. Uses isolation transformer ratio 1:2.07 for transformer coupled mode.
HI-1590
3.3V operation. Variable transmitter output amplitude controlled via an internal DAC or voltage reference pin.
